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* Q. Huppert, T. Evenblij, M. Perumkunnil, F. Catthoor, L. Torres, and D. Novo. "Memory Hierarchy Calibration Based on Real Hardware In-order Cores for Accurate Simulation." In Proceedings of Design, Automation & Test in Europe Conference & Exhibition (DATE) 2021. https://hal-lirmm.ccsd.cnrs.fr/lirmm-03084343/document |
Page des publications utiles pour ARCHISEC
Outils, technologies
http://gem5.org/wiki/images/0/0e/ASPLOS2017 gem5 tutorial.pdf. 2017.
http://gem5.org/Supported Architectures. 2018.
https://www.qemu.org/. 2018.
- ARM, Cortex A9 MPCore Accelerator Coherency Port. Accessed: 2017-04-12. ARM
Articles scientifiques
Q. Huppert, T. Evenblij, M. Perumkunnil, F. Catthoor, L. Torres, and D. Novo. "Memory Hierarchy Calibration Based on Real Hardware In-order Cores for Accurate Simulation." In Proceedings of Design, Automation & Test in Europe Conference & Exhibition (DATE) 2021. https://hal-lirmm.ccsd.cnrs.fr/lirmm-03084343/document
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